Riad Wahby: 2016 Security Workshop

 

Monday, April 11, 2016
Location: McCaw Hall, Arrillaga Alumni Center

"Verifiable ASICs: Trustworthy Hardware with Untrusted Components"

2:15pm


Joint work with Max Howald, Siddharth Garg, Abhi Shelat, and Michael Walfish.


Abstract:

A manufacturer of custom hardware (an ASIC) can undermine the intended execution of that hardware; high-assurance execution thus requires controlling the manufacturing chain. However, a trusted platform might be orders of magnitude worse in performance or price than an advanced, untrusted platform. This paper explores an alternative: using verifiable computation (VC), an untrusted ASIC computes proofs of correct execution, which are verified by a trusted processor or ASIC. Notably, in the present setting, the prover and verifier together must impose less overhead than the baseline alternative of running the given computation directly on the trusted platform. We respond to this challenge by designing and implementing physically realizable, area-efficient, high throughput ASICs (for a prover and verifier), in fully synthesizable Verilog. The system, called Zebra, is based on the CMT interactive proof protocol; instantiating Zebra required a blend of new observations about CMT, careful hardware design, and attention to architectural challenges. We measure and evaluate Zebra; for a class of real computations, it indeed poses less overhead than executing directly on the trusted platform.


Bio:

Riad S. Wahby is a first-year Ph.D. student at Stanford, advised by David Mazieres and Keith Winstein. He was previously a junior research scientist at the Courant Institute at NYU, working with Michael Walfish on verifiable computation, cryptographic hardware, and operating systems security; and he spent ten years as an analog and mixed-signal integrated circuit designer at Silicon Laboratories in Austin, TX. Riad graduated from MIT in 2004 with an S.B. and M.Eng. in Electrical Engineering and Computer Science.