2012 Poster Sessions : Low Latency Network Interfaces

Student Name : Mario Flajslik
Advisor : Mendel Rosenblum
Research Areas: Computer Systems
Abstract:
In the past most network requests in datacenters would end either with a database disk access, or going out of the datacenter into a WAN. This meant that latency of a request-response protocol would be dominated by either a long WAN link or disk access time. This has changed with the introduction of RAM storage and cache systems (like memcached). In this poster we present an analysis of where network latency, in commodity systems, comes from and some ideas on how to improve it, with the focus being on the interface between the network card and the host CPU.

An experimental system was developed to provide insight into how network cards work and interact with the host machine. The system includes an FPGA development board (NetFPGA) plugged into a host machine through a PCIe slot. A custom network card was designed in the FPGA and an accompanying driver was written to communicate with the card and test various configurations.

In this poster we present a breakdown of hardware latency for this particular FPGA design. We also show a comparison between different host configurations that include using write combining caching policy to communicate with the NIC, as well as pulling small packets straight into the CPU cache as they arrive over the network.

Bio:
Mario is a Electrical Engineering PhD student working with professor Rosenblum. His research interests include computer architecture and computer networking, I/O and how it interacts with the OS, as well as digital design and systems level programming. Mario received his MS degree from Stanford University and his undergraduate degree from University of Zagreb, Croatia.