2014 Poster Sessions : SI-TM: Reducing Transactional Memory Abort Rates through Snapshot Isolation

Student Name : Heiner Litz
Advisor : David Cheriton
Research Areas: Computer Systems
Transactional memory represents an attractive conceptual model for programming concurrent applications. Unfortunately, high transaction abort rates can cause significant performance degradation. Conventional transactional mem- ory realizations not only pessimistically abort transactions on every read-write conflict but also because of false shar- ing, cache evictions, TLB misses, page faults and interrupts. Consequently, the use of transactions needs to be restricted to a very small number of operations to achieve predictable performance, thereby, limiting its benefit to programming simplification. We investigate snapshot isola- tion transactional memory in which transactions operate on memory snapshots that always guarantee consistent reads. By exploiting snapshots, an established database model of transactions, transactions can ignore read-write conflicts and only need to abort on write-write conflicts. Our implementation utilizes a memory controller that supports multiversion memory, to efficiently support snapshotting in hardware. We show that snapshot isolation can reduce the number of aborts in some cases by three orders of magnitude and improve per- formance by up to 20x.

Heiner Litz is a postdoctoral researcher at Stanford University working together with Prof. David Cheriton. He obtained his PhD in Computer Science at Heidelberg University, Germany and received his Diplom (MSc) in computer engineering from Mannheim University, Germany. Heiner's research focuses on improving the flexibility, programmability, performance and power efficiency of memory systems. He is interested in heterogenous many-core systems leveraging new programming and execution models as well as debugging methods. His work combines traditional architecture, compilers, runtime systems and programming interfaces. Beyond, Heiner has performed research in the fields of high performance computing, low latency messaging, high frequency trading and distributed shared memory all down to the RTL and FPGA prototyping level.